Volume 7, Number 4 (2021)
CONTENTS
Tomasz Stefanski, Wieslaw J. Kordalski, Hans Hauer
AN EXPERIMENTAL VERIFICATION OF NEW NON-QUASI-STATIC SMALL-SIGNAL MOSFET MODEL
(pp. 2-6 PDF)
Mona Safi-Harb, Gordon W. Roberts
A 36 MW, 13 B, 2.1 MS/S MULTI-BIT DS ADC IN 0.18 M DIGITAL CMOS PROCESS USING AN EFFICIENT TOP-DOWN DESIGN METHODOLOGY
(pp. 7-11 PDF)
Salem Elabed
COMPARATIVE ANALYSIS OF DIFFERENT RECEIVE ALGORITHMS FOR BLAST ARCHITECTURE IN MOBILE COMMUNICATION SYSTEMS
(pp. 12-15 PDF)
Sumant Sathe, Daniel Wiklund, Dake Liu
DESIGN OF A LOW LATENCY ROUTER FOR ON-CHIP NETWORKS
(pp. 16-20 PDF)
Helene Tap-Beteille, Marc Lescure
A SERIES VOLTAGE REGULATOR INTEGRATED IN CMOS TECHNOLOGY
(pp. 21-25 PDF)
Chris Taillefer,M. Bonnin, M. Gilli and P. P. Civalleri
A MIXED TIME-FREQUENCY DOMAIN APPROACH FOR THE QUALITATIVE ANALYSIS OF AN HYSTERETIC OSCILLATOR
(pp. 26-29 PDF)
Wladyslaw Szczesniak, Piotr Szczesniak
LOW POWER DIGITAL CMOS VLSI CIRCUITS DESIGN WITH DIFFERENT HEURISTIC ALGORITHMS
(pp. 30-34 PDF)
H. Tap-Beteille, D. Roviras, M. Lescure, A. Mallet
HIGH POWER AMPLIFIER PREDISTORTER ASIC IN STANDARD DIGITAL CMOS TECHNOLOGY
(pp. 35-39 PDF)