A PROGRAMMABLE DSP CORE DESIGN FOR SPEECH/AUDIO CODEC SOC

Chin-Teng Lin, Jen-Feng Chung, and Der-Jenq Liu,
Department of Electrical and Control Engineering, National Chiao-Tung University, Taiwan

DOI: 10.36724/2664-066X-2022-8-1-20-24

SYNCHROINFO JOURNAL. Volume 8, Number 1 (2022). P. 20-24.

Abstract

A novel programmable DSP core, called LASP24 (Low-cost Application-driven Speech Processor, with 24-bit data width), is developed. It is targeted as a wide-range platform of multimedia applications. The processor core is optimized to efficiently perform fundamental operations for speech/audio signal processing such as vector and matrix operations, and it can be easily embedded into the SOC platform. The design is fabricated with the UMC 0.18 m standard-cell technology in the total area of 6.5 mm2, and it can operate at 100 MHz. It has also been demonstrated that the MELP speech coding and the sound reverberation method could be executed in real-time on the LASP24 operating at 80 Mhz. The assembler and emulator environment have also been developed for designers to verify their algorithms.

Keywords MELP, reverberation, vector, matrix, LPC, floating-point, emulator, autocorrelation.

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