Implementation of a reduced complexity high performance data acquisition chip using 0.18 micron technology
Hai P. Le, Aladin Azyegh, Jugdutt Singh,
Faculty of Science Engineering & Technology, Victoria University, Victoria, Australia
DOI: 10.36724/2664-066X-2021-7-3-22-26
SYNCHROINFO JOURNAL. Volume 7, Number 3 (2021). P. 22-26.
Abstract
Data acquisition (DAQ) in the general sense is the process of collecting information from the real world. For engineers and scientists, this data is mostly numerical and is usually collected, stored and analysed using computers. However, most of the input signals cannot be read directly by digital computers. Because they are generally analog signals distinguished by continuous values, while computers can only recognise digital signals containing only the on/off levels. DAQ systems are therefore inevitably necessary, as they include the translation requirements from analog signals to digital data. For this reason, they have become significant in wide range of applications in modern science and technology [1]. The paper precents the disign of a 12-bit high-speed low-power Data Acquisition (DAQ) Chip. In this paper, the disigns of the building block components are aimed at high-accuracy along with high-speed and low power dissipation. A modifided flash Analog-to-Digital converter (ADC) was used instead of the traditional flash proposed DAQ chip operates at 1 GHz master clock frequency and achieves a sampling speed of 125 MS/s. It dissipates only 64.9 mW of power as compared to 97.2 mW when traditional flash ADC was used.
Keywords: Data acquisition, High-speed integrated circuits, Integrated circuit design, Analog-to-Digital Converter.
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